| Paper ID | SPTM-17.6 |
| Paper Title |
ERROR ESTIMATES IN SECOND-ORDER CONTINUOUS-TIME SIGMA-DELTA MODULATORS |
| Authors |
Dilshad Surroop, PSL University, France; Pascal Combes, Schneider Electric, France; Philippe Martin, PSL University, France |
| Session | SPTM-17: Sampling, Multirate Signal Processing and Digital Signal Processing 3 |
| Location | Gather.Town |
| Session Time: | Thursday, 10 June, 15:30 - 16:15 |
| Presentation Time: | Thursday, 10 June, 15:30 - 16:15 |
| Presentation |
Poster
|
| Topic |
Signal Processing Theory and Methods: [SMDSP] Sampling, Multirate Signal Processing and Digital Signal Processing |
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| Virtual Presentation |
Click here to watch in the Virtual Conference |
| Abstract |
Continuous-time Sigma-Delta (CT-$\Sigma\Delta$) modulators are oversampling Analog-to-Digital converters that may provide higher sampling rates and lower power consumption than their discrete counterpart. Whereas approximation errors are established for high-order discrete time $\Sigma\Delta$ modulators, theoretical analysis of the error between the filtered output and the input remain scarce. This paper presents a general framework to study this error: under regularity assumptions on the input and the filtering kernel, we prove for a second-order CT-$\Sigma\Delta$ that the error estimate may be in $o(1/N^2)$, where $N$ is the oversampling ratio. The whole theory is validated by numerical experiments. |
